Cadence University Program Member
CADENCE Tutorials
at the
Department of ECE
University of Massachusetts Amherst

You must have added the cadence information to your .login and .cshrc files. See Setup.

For official help tools type

example> cdsdoc

Back to U-MASS Design-Flow

The following links give some quick guidance to start using the design tools now.

Verilog
Schematic Editor
Spectre Simulator
LayoutEditor

In addition here are some good links from other schools that have detailed examples

http://www.ee.washington.edu/class/cadta/cadence/index.html
http://vlsi.wpi.edu/cds/

These links are important in supporting a cadence design flow.

The cadence administrator has made modifications to the NCSU and VTVT libraries in order for them to work properly. If you are doing research you should be aware of these modifications. Use at your own risk.


Disclaimer: Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are personally satisfied with the use of this information within your environment.
Cadence CadenceTM is a trademark of Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134.
Page created and Maintained by
Jinwook Jang,
Research Assistant
Interconnect Circuit Design Group
Electrical & Computer Engineering Dept
University of Massachusetts Amherst
Phone - 413 545 0188
Last updated: 08/15/2007